spinn_common  7.4.2
Support code for SpiNNaker applications.
arm.h
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1 /*
2  * Copyright (c) 2013 The University of Manchester
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  * https://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
46 #ifndef __ARM_H__
47 #define __ARM_H__
48 #include <stdint.h>
49 
50 #ifdef __arm__
51 
56 
57 static inline uint32_t __add(uint32_t x, uint32_t y)
58 {
59  register uint32_t r;
60 
61  asm volatile(
62  "add %[r], %[x], %[y]"
63  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
64  return r;
65 }
66 
71 
72 static inline uint32_t __adc(uint32_t x, uint32_t y)
73 {
74  register uint32_t r;
75 
76  asm volatile(
77  "adc %[r], %[x], %[y]"
78  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
79  return r;
80 }
81 
87 
88 static inline uint32_t __adds(uint32_t x, uint32_t y)
89 {
90  register uint32_t r;
91 
92  asm volatile(
93  "adds %[r], %[x], %[y]"
94  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
95  return r;
96 }
97 
103 
104 static inline uint32_t __adcs(uint32_t x, uint32_t y)
105 {
106  register uint32_t r;
107 
108  asm volatile(
109  "adcs %[r], %[x], %[y]"
110  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
111  return r;
112 }
113 
118 
119 static inline uint32_t __sub(uint32_t x, uint32_t y)
120 {
121  register uint32_t r;
122 
123  asm volatile(
124  "sub %[r], %[x], %[y]"
125  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
126  return r;
127 }
128 
133 
134 static inline uint32_t __sbc(uint32_t x, uint32_t y)
135 {
136  register uint32_t r;
137 
138  asm volatile(
139  "sbc %[r], %[x], %[y]"
140  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
141  return r;
142 }
143 
149 
150 static inline uint32_t __subs(uint32_t x, uint32_t y)
151 {
152  register uint32_t r;
153 
154  asm volatile(
155  "subs %[r], %[x], %[y]"
156  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
157  return r;
158 }
159 
165 
166 static inline uint32_t __sbcs(uint32_t x, uint32_t y)
167 {
168  register uint32_t r;
169 
170  asm volatile(
171  "sbcs %[r], %[x], %[y]"
172  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
173  return r;
174 }
175 
180 
181 static inline uint32_t __rsb(uint32_t x, uint32_t y)
182 {
183  register uint32_t r;
184 
185  asm volatile(
186  "rsb %[r], %[x], %[y]"
187  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
188  return r;
189 }
190 
195 
196 static inline uint32_t __rsc(uint32_t x, uint32_t y)
197 {
198  register uint32_t r;
199 
200  asm volatile(
201  "rsc %[r], %[x], %[y]"
202  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : );
203  return r;
204 }
205 
211 
212 static inline uint32_t __rsbs(uint32_t x, uint32_t y)
213 {
214  register uint32_t r;
215 
216  asm volatile(
217  "rsbs %[r], %[x], %[y]"
218  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
219  return r;
220 }
221 
227 
228 static inline uint32_t __rscs(uint32_t x, uint32_t y)
229 {
230  register uint32_t r;
231 
232  asm volatile(
233  "rscs %[r], %[x], %[y]"
234  : [r] "=r" (r) : [x] "r" (x), [y] "r" (y) : "cc");
235  return r;
236 }
237 
238 #else /*__arm__*/
239 #include <static_assert.h>
240 static_assert(false, "Attempt to use arm intrinsics on non-arm architecture");
241 #endif /*__arm__*/
242 #endif /*__ARM_H__*/
static uint32_t __adcs(uint32_t x, uint32_t y)
This function gives access to the ARM adcs instruction.
Definition: arm.h:104
static uint32_t __rsbs(uint32_t x, uint32_t y)
This function gives access to the ARM rsbs instruction.
Definition: arm.h:212
static uint32_t __rsb(uint32_t x, uint32_t y)
This function gives access to the ARM rsb instruction.
Definition: arm.h:181
static uint32_t __rscs(uint32_t x, uint32_t y)
This function gives access to the ARM rscs instruction.
Definition: arm.h:228
static uint32_t __adc(uint32_t x, uint32_t y)
This function gives access to the ARM adc instruction.
Definition: arm.h:72
static uint32_t __sbcs(uint32_t x, uint32_t y)
This function gives access to the ARM sbcs instruction.
Definition: arm.h:166
static uint32_t __adds(uint32_t x, uint32_t y)
This function gives access to the ARM adds instruction.
Definition: arm.h:88
static uint32_t __sub(uint32_t x, uint32_t y)
This function gives access to the ARM sub instruction.
Definition: arm.h:119
static uint32_t __subs(uint32_t x, uint32_t y)
This function gives access to the ARM subs instruction.
Definition: arm.h:150
static uint32_t __add(uint32_t x, uint32_t y)
This function gives access to the ARM add instruction.
Definition: arm.h:57
static uint32_t __sbc(uint32_t x, uint32_t y)
This function gives access to the ARM sbc instruction.
Definition: arm.h:134
static uint32_t __rsc(uint32_t x, uint32_t y)
This function gives access to the ARM rsc instruction.
Definition: arm.h:196
#define static_assert(predicate, msg)
This macro gives access to GCC's built-in static assertion.
Definition: static-assert.h:53